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unisonic technologies co., ltd ub209a preliminary cmos ic www.unisonic.com.tw 1 of 9 copyright ? 2017 unisonic technologies co., ltd qw-r502-940.e battery protection ic with cell-balance function ? description the utc ub209a series is a protection ic for lithium-ion/lithium polymer rechargeable batteries, including a high precision voltage detection circuit and a delay circuit. the utc ub209a series has a transmission function and two types of cell-balance function so that users are also able to configure a protection circuit with series multi-cell. ? features * settable delay time by external capacitor for output pin * high-accuracy voltage detection circuit * two types of cell-balance function: charge/discharge * control charging, discharging, cell-balance by ctlc, ctld pins * low current consumption: 8.0a max * wide range of operation temperature (-40c ~ +85c) ? ordering information ordering number lead free halogen free package packing ub209al-xx-s08-r ub209ag-xx-s08-r sop-8 tape reel ub209al-xx-p08-r ub209ag-xx-p08-r tssop-8 tape reel note: xx: output voltage, refer serial code list. ub209ag-xx-s08-r (1)packing type (2)package type (3)output voltage code (1) r: tape reel (2) s08: sop-8, p08: tssop-8 (3) xx: refer to serial code list (4) g: halogen free and lead free, l: lead free (4)green package
ub209a preliminary cmos ic unisonic technologies co., ltd 2 of 9 www.unisonic.com.tw qw-r502-940.e ? serial code list model code overcharge detection voltage [v cu ](v) overcharge release voltage [v cl ](v) cell-balanc e detection voltage [v bu ](v) cell-balanc e release voltage [v bl ](v) overdischar ge detection voltage [v dl ](v) overdischar ge release voltage [v du ](v) discharge cell-balance function aa 4.100 4.000 4.050 4. 000 2.50 2.70 yes ab 3.800 3.750 3.650 3. 600 2.00 2.50 yes ac 3.900 3.500 3.550 3.550 2.50 2.70 yes ad 4.250 4.100 4.200 4.100 2.50 3.00 yes ae 4.000 3.900 3.950 3. 900 2.50 2.70 yes af 4.250 4.100 4.100 4.000 2.75 3.05 yes ag 3.900 3.600 3.550 3.500 2.00 2.40 yes ah 3.900 3.700 3.600 3.600 2.50 2.80 no ai 4.150 4.050 3.900 3.900 3.00 3.30 yes aj 4.250 4.150 4.100 4.050 2.50 2.80 yes ub209a ak 4.300 4.200 4.225 4. 225 2.00 2.50 yes ? marking sop-8 tssop-8 ? pin configuration 4 3 2 5 7 ctld v dd cdt v ss co 1 6 do 8 cb ctlc ? pin description pin no. pin name description 1 ctlc pin for charge control 2 ctld pin for discharge control 3 v dd connection pin for input positive power supply, for battery?s positive voltage 4 cdt connection pin to capacitor for overcharge detection delay, for over discharge detection delay 5 v ss input pin for negative power supply, conn ection pin for battery?s negative voltage 6 do output pin for discharge control (nch open drain output) 7 co output pin for charge control (nch open drain output) 8 cb output pin for cell-ba lance control (cmos output) ub209a preliminary cmos ic unisonic technologies co., ltd 3 of 9 www.unisonic.com.tw qw-r502-940.e ? block diagram logic control and delay circuit 400 na 400 na co do cb ctld ctlc cdt v dd v ss 8.31 m ? overcharge detection comparator cell-balance detection comparator overdischarge detection comparator + - + - + - ub209a preliminary cmos ic unisonic technologies co., ltd 4 of 9 www.unisonic.com.tw qw-r502-940.e ? absolute maximum rating (t a =25c unless otherwise specified) parameter symbol ratings unit input voltage between v dd and v ss v ds v ss -0.3 ~ v ss +9.0 v cb pin output voltage v cb v ss -0.3 ~ v dd +0.3 v cdt pin voltage v cdt v ss -0.3 ~ v dd +0.3 v do pin output voltage v do v ss -0.3 ~ v ss +18 v co pin output voltage v co v ss -0.3 ~ v ss +18 v ctlc pin input voltage v ctlc v dd -18 ~ v dd +0.3 v ctld pin input voltage v ctld v dd -18 ~ v dd +0.3 v sop-8 mw power dissipation (note 2) tssop-8 p d 700 mw operating ambient temperature t opr -40 ~ +85 c storage temperature t stg -55 ~ +125 c notes: 1. absolute maximum ratings are those values beyond which the device could be permanently damaged. absolute maximum ratings are stress ratings only and functional device oper ation is not implied. 2. when mounted on board size: 114.3mm76.2mm1.6mm. ub209a preliminary cmos ic unisonic technologies co., ltd 5 of 9 www.unisonic.com.tw qw-r502-940.e ? electrical characteristics (t a =25c unless otherwise specified) parameter symbol test conditions min typ max unit test circuit overcharge detection voltage v cu v cu -0.05 v cu v cu +0.05 v 1 overcharge release voltage v cl v cl -0.05 v cl v cl +0.05 v 1 cell-balance detection voltage v bu v bu -0.05 v bu v bu +0.05 v 1 cell-balance release voltage v bl v bl -0.05 v bl v bl +0.05 v 1 over discharge detection voltage v dl v dl -0.10 v dl v dl +0.10 v 1 over discharge release voltage v du v du -0.10 v du v du +0.10 v 1 detection delay time (note 1) t det c cdt =0.01f 50 100 150 ms 2 release delay time t rel c cdt =0.01f 5 10 15 ms 2 cdt pin detection voltage v cdet v ds =3.5v v ds 0.65 v ds 0.70 v ds 0.75 v 3 operating voltage between v dd and v ss v dsop output voltage of co, do, cb fixed 1.5 8.0 v ctlc pin h voltage v ctlch v ds =3.5v v ds 0.55 v ds 0.90 v 4 ctld pin h voltage v ctldh v ds =3.5v v ds 0.55 v ds 0.90 v 4 ctlc pin l voltage v ctlcl v ds =3.5v v ds 0.10 v ds 0.45 v 4 ctld pin l voltage v ctldl v ds =3.5v v ds 0.10 v ds 0.45 v 4 current consumption during operation (note 2) i ope v ds =3.5v 3.5 8.0 a 5 source current ctlc (note 2) i ctlch v ds =3.5v, v ctlc =0v 200 400 600 na 6 source current ctld (note 2) i ctldh v ds =3.5v, v ctld =0v 200 400 600 na 6 source current cb i cbh v cb =4.0v, v ds =4.5v 30 a 7 sink current cb i cbl v cb =0.5v, v ds =3.5v 30 a 7 sink current co i col v co =0.5v, v ds =3.5v 30 a 7 leakage current co i coh v co =18v, v ds =4.5v 0.2 a 8 sink current do i dol v do =0.5v, v ds =3.5v 30 a 7 leakage current do i doh v do =18 v, v ds =1.8v 0.2 a 8 notes: 1. in the utc ub209a series, users are able to set delay time for the output pins. by using the following formula, delay time is calculated with the va lue of cdt pin?s resistance in the ic (r cdt ) and the value of capacitor set externally at the cdt pin (c cdt ). t d [s]=-ln(1-v cdet /v ds )c cdt [f]r cdt [m ? ] =-ln (1-0.7(typ.) )c cdt [f]8.31m ? (typ.) =10.0m ? (typ.)c cdt [f] in case of the capacitance of cdt pin c cdt =0.01f, the output pin delay time t d is calculated by using the above formula and as follows. t d [s]=10.0m ? (typ.)0.01f=0.1s(typ.) test the cdt pin detection voltage (v cdet ) by test circuits shown in this datasheet after applying the power supply while pulling-down the ctlc, ctld pins to the level of v ss pin outside the ic. 2. in case of using ctlc, ctld pins pulled-down to the level of v ss pin externally, the current flows into the v dd pin (i dd ) is calculated by the following formula. i dd =i ope +i ctlch +i ctldh ub209a preliminary cmos ic unisonic technologies co., ltd 6 of 9 www.unisonic.com.tw qw-r502-940.e ? test circuit 100 k ? 100 k ? 100 k ? 100 k ? 100 k ? 100 k ? ub209a preliminary cmos ic unisonic technologies co., ltd 7 of 9 www.unisonic.com.tw qw-r502-940.e ? test circuit(cont.) ? operation figure 9 shows the operat ion transition of utc ub209a . ub209a preliminary cmos ic unisonic technologies co., ltd 8 of 9 www.unisonic.com.tw qw-r502-940.e ? operation 1. normal status in the utc ub209a , both of co and do pin get the v ss level; the voltage between v dd and v ss (v ds ) is more than the overdischarge detection voltage (v dl ), and is less than the over charge detection voltage (v cu ) and respectively, the ctlc pin input voltage (v ctlc ) |
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